Fast-paced technology progress in semiconductor integrated circuit (IC) industry has benefited well for the manufacturing of active matrix liquid crystal display (AMLCD) TV and computer monitor displays. In the recent years, the size of LCD TV and computer monitor displays has grown to be larger and yet more affordable.
In the semiconductor IC industry, a technology generation is defined by the critical dimension (CD) of the circuit design rules. As each technology generation progresses, the IC of the later generation has smaller feature CD target and tighter tolerance. For the Flat Panel Display (FPD) industry, on the other hand, a technology generation is classified by the physical dimension of substrate used in manufacturing. In one example, the substrate sizes (in millimeter×millimeter) of FPDs sixth generation (G6) in 2005, eighth generation (G8) in 2007, and tenth generation (G10) in 2009 are 1500×1800, 2160×2460, and 2880×3080 respectively.
The lithography challenges in terms of making semiconductor ICs and FPD substrates are both trying to make larger sizes more affordable. However, they are entirely different from the manufacturing perspective. For the IC industry, a primary challenge is small CD features can be produced on a round 300 mm wafer. The goal is to pack as many transistors as possible for achieving better functionalities in the same die size. But for the FPD industry, one primary challenge is how large an entire rectangle substrate can be processed. The larger FPD substrate can be processed in a manufacturing line, the bigger size TVs or monitors can be produced with lower cost. The typical LCD TVs and monitors are designed with more sophisticated thin film transistor (TFT) for better performance. Still, the TFT CD target remains in the same specification range. In one viewpoint, one of the main challenges for FPD manufacturing is to keep throughput in pace with justifiable economics for each successive generation. Achieving profitable process yield is a key consideration, and the manufacturing process window needs to be preserved.
Conventionally, lithography technologies for manufacturing of FPD are derived from lithography process technologies for making semiconductor ICs. Majority of lithography exposure tools used for making FPD substrates are projection stepper and/or scanner systems. These are either 2-times reduction or 1-to-1 projection from mask to substrate. In order to project mask patterns to the substrate, the mask must first be made with the acceptable CD specifications. The FPD mask manufacturing process is similar to the one used for manufacturing semiconductor ICs, with the exception that the mask size for making semiconductor ICs is about 150 mm or 6 inches per side, whereas the mask size for manufacturing FPD, in one example, may be nearly 8-times larger per side, or physically more than one meter per side.
FIG. 1 illustrates a conventional configuration of projection exposure tool used for scanning mask patterns onto FPD substrate. In this configuration, the exposure sources used are mainly high pressure mercury (Hg) short-arc lamps. The incoming illumination light is reflected by a light folding mirror 102, and the reflected light passes through a mask 104, a projection lens 106 before it reaches a FPD substrate 108. The concern of using this conventional mask-based exposure tool configuration as shown in FIG. 1 for the upcoming FPD lithography manufacturing is the issue of handling the increasing physical size of masks. In one example, for the G8 FPD, the size of a mask is about 1080 mm×1230 mm. The area size of G8 substrate is four times larger. The TFT CD feature specification is in the range of 3 microns ±10%. The CD control for TFT over more-than-two-meters per side of G8 substrate is more challenging than controlling specifications for printing advanced IC features on a 300 mm silicon wafer. The challenge facing the FPD industry is to build such a mask-based exposure tool cost effectively for the upcoming FPD generations while preserving acceptable lithography process window.
To mitigate CD uniformity issue over the entire FPD exposure field, one approach is to use multiple exposures method. The nominal exposure is composed of several component exposures in adequate proportions. Each component exposure uses pre-selected wavelength for illumination along with the corresponding projection lens for scanning and stepping. More than one projection lenses need to be included in this type of exposure tool but only single illumination source is equipped. This is due to the need of using high powered Hg short-arc illumination sources in kilo Watts (KW) for throughput. The selection of exposure wavelength can be done by applying adequate filter to the source. In one example, this multi-wavelength exposure method relaxes the negative impact on CD uniformity over a G8 substrate hence allowing more economical quality of lens and illumination set-up to be used.
In using multi-wavelength exposures, it is necessary to specify more stringent CD target and uniformity on the mask itself. In one example, the TFT mask CD tolerance is under 100 nm, much smaller than otherwise necessary for the nominal 3 microns mask CD target. One reason is that the process window for FPD lithography manufacturing can be more manageable for the existing exposure tool configuration. Unfortunately, the tighter FPD mask CD specifications required would push the already costly mask set to be even more expensive. In some situations, making a critical level mask for the G8 FPD becomes very expensive and has long delivery lead time.
Yet another problem with the conventional approach is the defect density control for the use of larger sized masks. Lithography processing with such a large size mask using multiple exposures, even starting with defect free mask, is prone to introduce detrimental defects. A defect prone process impacts yield and ultimately the cost of the mask.
FIG. 1b illustrates another setup of a conventional exposure tool. As shown in FIG. 1b, the exposure tool includes a light source 110, a first projection lens 112, a reticle 114 (also referred to as a mask), a second projection lens 116, a wafer 118, and a wafer stage 120. The light source 110 is controlled to project rays of light via the first projection lens 112 to the reticle 114, where the reticle contains patterns to be imaged onto the wafer 118. A portion of the light rays is blocked by the reticle 114, and other portion of the light rays is allowed to pass through the reticle 114 to expose the wafer 118 via the second project lens 116. The light rays passed through the reticle 114 exposed certain areas of the wafer 118 to generate a set of pattern images that corresponds to IC design pattern formed on the reticle 122.
Note that the wafer is held by the wafer stage 120, which may be controlled to move in directions as shown by the arrows. In a conventional stepper system, the light source 110 is either blue visible light or near UV, the first projection lens 112, the reticle 114, the second projection lens 116 remain stationery, while the wafer 118 and the wafer stage 120 that holds the wafer move to allow different areas on the wafer 118 to be exposed. The stepper system may be used to manufacture designs with resolution accuracies in the range of 1 to 3 microns, such as for manufacturing small sized masks, LEDs, and fourth generation or earlier flat panel displays. In a conventional scanner system, both the light source 110, the first projection lens 112, and the second projection lens 116 remain stationery, while the reticle 114, the wafer 118 and the wafer stage 120 that holds the wafer move to allow different areas on the wafer 118 to be exposed. The scanner system is more efficient in handling large-sized mask flat panel displays than the stepper system, and is more expensive than the stepper system. The scanner system is typically used to manufacture sixth generation of later flat panel displays that are made with much larger substrate size.
FIGS. 1c-1e illustrates different ways a mask may be held in conventional exposure tools, and manners to align the mask for exposure. In FIG. 1c, the mask 130 is held in contact with the substrate wafer 132 and is commonly referred to as a contact aligner system; while in FIG. 1d, the mask 130 is held in proximity of the substrate wafer 132 and is commonly referred to as a proximity aligner system. The conventional contact aligner system and the proximity aligner system are typically used in manufacturing of printed circuit boards, touch panels (25-40 um), light emitting diodes (3-5 um), and solar panels (>100 um). Some of the drawbacks of the contact aligner and proximity aligner systems are that they have problems handling high resolution designs and warped wafers or substrate larger than 4 inches in size.
FIG. 1e illustrates a conventional projection aligner system, where there is a projection lens 131 between the mask 130 and the substrate wafer 132. It is typically used in manufacturing of circuits in the range of 5-10 um. Such a projection aligner is more suited with the use of large-sized mask for making color filters in flat panel displays. The drawback is that such large-sized masks are quite expensive. Therefore, the projection aligner system is not cost efficient for manufacturing of printed circuit boards, and light emitting diodes where substantial mask cost is less tolerable.
FIG. 2 illustrates a conventional mask making exposure tool configuration. In this exposure tool configuration, illumination light 202 is sent to a beam splitter 204 and then partially reflected to illuminate the spatial light modulator (SLM) 206 through a Fourier lens 208. Then, the imaging light rays reflected back, pass through the Fourier lens 208, the beam splitter 204, the Fourier filter 210 and the reduction lens 212, and finally reach to the mask blank substrate 216. Mask data 214 is sent to the SLM 206 electronically to set the micro-mirror pixels. The reflected light produce bright spots on the mask blank substrate 216, or otherwise absence of reflected light would produce dark spots on the mask blank substrate 216. By controlling and composing the reflections, mask data patterns can be transferred to the mask blank substrate 216.
Note that for this type of exposure tool configuration, the illumination light path is folded in order to illuminate the SLM at a right angle incidence. This folded illumination path makes a “T” joint to the exposure imaging path. In addition to high power illumination source, this type of exposure system requires using projection lens with high reduction ratio in order to write mask pattern in high accuracy and precision. Typically, the lens reduction ratio is about 100 times. Using such a high reduction ratio of lens makes the exposure field very small with a single SLM die. The physical die size for SLM is in the neighborhood of 1 cm. After a 100-times reduction, the SLM writing field is reduced to around 100 microns. This writing field size is very small and therefore slow when attempting to write a full G8 FPD mask.
Another conventional approach is to use multiple laser beams to illuminate the SLM in succession. The multiple beams are generated by reflecting a single illumination laser source from multi-faced rotating mirrors. Multiple illumination beams speed up mask writing as they make multiple exposures at a given time. With this configuration, in one instance, the time for writing a G8 FPD mask takes nearly twenty hours. Such a long write time makes machine control expensive to sustain both mechanically and electronically, hence increases the cost of the FPD mask produced. Using the same exposure tool for the upcoming G10 or beyond, the cost of manufacturing FPD masks will be even higher.
In another conventional approach, to address the mask cost issue for low volume prototyping application, one exposure tool configuration is to make use of transparent SLM as the mask. This is done such that the mask pattern can be read into SLM to show desired mask patterns without the need to make a real physical mask. The function of such a transparent SLM mask takes place of the real mask. This saves the mask cost. From the exposure tool configuration perspective, this method is essentially the same as the mask-based projection system. Unfortunately, the SLM mask has lower image quality as compared to the image quality on an actual mask. It does not meet the pattern specification requirements for FPD manufacturing.
In yet another conventional approach, a process for roll-to-roll manufacture of a display by synchronized photolithographic exposure on a substrate web is described in U.S. Pat. No. 6,906,779 (the '779 patent). The '779 patent teaches a method to expose mask pattern on a roll of substrate. In addition, another conventional method for doing roll-to-roll lithography is described in the article “High-Speed Roll-to-Toll Nanoimprint Lithography on Flexible Plastic Substrates” by Se Hyun Ahn, etc., Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim; Advanced Materials 2008, 20, page 2044-2049 (the Ahn article).
However, in both conventional methods described above, the mask is limited to a predetermined physical size, and the physical mask dimension essentially limits the dimension of the flexible display that can be manufactured. Another problem with the conventional methods described by the 779 patent and the Ahn article is that, to achieve a reasonable printing result, the roll of substrate must be stretched flat during the exposure stage. As a result, the surface flatness of the substrate is not as good as rigid glass substrate, typically used for LCD TV display. With such a mask-based lithography, the depth of focus (DOF) is limited due to uneven substrate surface. Thus, it can be very challenging for these conventional methods to pattern TFT feature critical dimension (CD) at 5 μm or less. To achieve decent definition display based on TFT, it is necessary to have CD for TFT mask pattern in the neighborhood of 3 μm.
The challenges discussed previously for the manufacturing of future generations of FPDs are driven by the need for cost reduction for the FPD industry. One key motivation is to achieve cost efficiency when the newer manufacturing generation is being adopted. Lithography process requires maintaining throughput efficiency while assuring product yield better than previous generations. This demands wider lithography process window and fewer process defects while contending with bigger FPD substrates. As discussed above, there are numerous shortcomings with the existing exposure tool configurations. One of the major shortcomings is associated with the use of a mask. The size of the mask is too large to be manufactured cost effectively. This shortcoming continues to grow as the size of the mask must increase in order to keep up with future generations of FPDs. Therefore, there is a need for an improved imaging writer system that addresses the issues of the conventional tools and approaches.